March 09, 2013

Clock Skew: Implication on Timing

Clock Skew is an important parameter that greatly influences the timing checks and you would often find the backend design engineers always keeping a close eye on the clock skew numbers. 

Clock Skew: The difference in arrival times of the clock signal at any two flops which are interacting with one another is referred to as clock skew. Having said that, please note that skew only makes sense for two flops which are interacting with one another, i.e. they make a launch-capture pair. 
If the clock at the capture flop takes more time to reach as compared to the clock at the launch flop, we refer to it as Positive Clock Skew. And when the clock at capture flop takes less time to reach the clock at the launch flop, we refer to it as Negative Clock Skew.
The figure below describes positive & negative clock skew. Assume the delays of clock tree buffers to be the same.
How does clock skew impact the timing checks, in particular, setup and hold? Consider the above example where FF1 is the launching flop and FF2 is the capturing flop. If the clock skew between FF1 and FF2 was zero, the setup and hold checks would be as follows:

  • Positive Skew: Now imagine the case where clock skew is positive. Here, clock at FF2 takes more time to reach as compared to the time taken by the clock to reach the FF1. Recall that the setup check means that the data launched should reach the capture flop at most setup time before the next clock edge. As evident in the below the data launched from FF1 gets an extra time equal to the skew to reach FF2. Hence setup is relaxed! However, hold check means that data launched should reach the capture flop at least hold time after the clock edge. Hence, the hold is further made critical in case of positive skew. Read the definitions again and again till you grasp it!!

  • Negative Skew: Here, clock at FF1 takes more time to reach as compared to the time taken by the clock to reach the FF2. As evident in the below the data launched from FF1 gets lesser time equal to the skew to reach FF2. Hence setup is more critical! However, hold is relaxed!
    Some Key Points to Note:
  • Setup is the next cycle check, and positive skew relaxes the setup check and negative skew further tightens it.
  • Hold is the same cycle check, and negative skew relaxes the hold check and positive skew further tightens it.
  • Very rarely would one come across a path that is both setup as well as hold critical. Setup becomes critical when data path is huge or you have a large negative skew; and hold becomes critical when either data path is minimal or you have a large positive skew. Both these conditions are mutually exclusive and very rarely does they manifest themselves simultaneously. It is often a case when the uncommon clock path is significant. We shall discuss it in detail later.

14 comments:

  1. Thanks Palindrome. Excellent one.

    Now if the skew between launch and capture is +/- TSkew.

    I assume we set timing constraints like below to check the worst case for both setup and hold.

    for setup: T- TSkew ( Assume skew is negative )
    for hold: T- TSkew ( Assume skew is positive )

    above interpretation is correct?

    Thanks,
    Bond007

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  2. By T you mean the clock period, right? Conceptually, negative and positive skew is fine. But more often than not, we talk about the skew as the difference in arrival time between capture flop and the launching flop. And in the equations above, I mean the same.
    So, for setup, one can assume the effective clock period to be T + Tskew (Skew = C - L);
    However, hold is independent of the clock period. One can rather make the effective hold time as Hold Time + Tskew (Skew = C - L).

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  3. Direct to the point.

    A minor problem: the green arrow of the final figure should point to the rising edge.

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    Replies
    1. Apologies for the minor oversight. Thanks for pointing it out. I'll correct it pretty soon! :)

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  4. This is indeed the best explanation of clock skew implications in very simple language available on net !! excellent
    just to point out a minor error included by mistake, the definition of negative skew just above the second figure should be "clock at FF1 takes more time to reach as compared to the time taken by the clock to reach the FF2" . Just that FF1 and FF2 are to be exchanged.

    Thanks for the excellent post !!
    Regards

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    Replies
    1. Hi Pranshu! Thanks for your motivating words! It really is a privilege to hear such words from a fellow NSITian! :)

      And many thanks for pointing out the mistake. I have corrected it!

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  5. Thanks for good explanation. May I know the definition for the formulae mentioned in figure 1??

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  6. can u plz explain latch based timing and negative setup and hold with equations and waveforms tq

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  7. Hi Naman,

    What is useful skew. Is it correct to say that useful skew is same as positive skew ?

    Can useful skew be used to improve dynamic power ?

    Thanks.

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    Replies
    1. Positive skew is usually useful skew, but I have seen people adopting different conventions for positive and negative skew.
      Useful skew for setup is when capture clock is delayed.

      No, useful skew cannot be used to improve dynamic power. On the contrary, you'll be inserting some extra clock buffers to achieve positive skew, thereby increasing dynamic power. It can, however, help in reducing the peak power on the account of the fact that sequentials would now toggle at different times.

      Thanks for asking, Santosh! :)

      -Naman

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  8. An example would be very nice :)

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