Hi Palindrome. I was just curious to know whether 2:1 MUX would be called an universal gate or not? And how exactly would you define an universal gate?

Hi Tina. Yes, 2:1 MUX would be an universal gate. Universal Gate is one using which you can design any circuit. Including sequential logic like latches or flip flops. Basic thumb rule is that if you're given a gate or set of gates, try and make a NAND gate out of it. If you are, then the set of gates is an Universal Gate. 2:1 MUX can in fact be used to make a NAND gate, and hence it is an Universal Gate.

MUX might not occupy lesser area as compared to other universal gates like NAND or NOR. It really depends and varies from one technology to another. The biggest disadvantage of using MUX as an universal gate would be the increased pin density. Consider a 2 input NAND gate. It would have 3 pins, so you need routing resources for these 3 pins. MUX would have 4. This would result in increased pin-density and might result in congestion issues while routing the design.

It wouldn't help you if I were to post the solution. I would strongly recommend you to arrive at the solution from the truth table.

Truth table would be: P Q D B (P, Q are inputs; D is the difference; B is the borrow) 0 0 0 0 0 1 1 1 1 0 1 0 1 1 0 0

Now look at the outputs D and B. And try to implement it first using primitive gates, and then using 2:1 MUX. Please feel free to revert back in case you still have a doubt.

There's no advantage of implementing a 2:1 MUX using HA, but imagine a scenario where you have only Half adders and you wish to realize a multiplexer?

Alternatively, let's say, you taped-out your design with lots of spare cells in the base layer. However, you need to do some ECOs by changing the metal interconnects. And by chance you have lots of half adders. At that time you could use half adders to make a MUX.

In reality, it was just a problem intended to give you a feel that it is possible to play around with digital components! :)

In designing of multipliers as a part of digital system design in VLSI , using multiplexers or full adders would be more beneficial keeping in mind the characterisitics like delay , power and area of the multiplier ?? which of the two is likely to give us better results of the multiplier constraints specified above ???

Hi Palindrome. I was just curious to know whether 2:1 MUX would be called an universal gate or not? And how exactly would you define an universal gate?

ReplyDeleteHi Tina. Yes, 2:1 MUX would be an universal gate. Universal Gate is one using which you can design any circuit. Including sequential logic like latches or flip flops. Basic thumb rule is that if you're given a gate or set of gates, try and make a NAND gate out of it. If you are, then the set of gates is an Universal Gate. 2:1 MUX can in fact be used to make a NAND gate, and hence it is an Universal Gate.

ReplyDeleteHey, is it possible to make a decoder with demultiplexor?

ReplyDeleteWhat's the difference between the two? Decoder and Demultiplexer are the same. Did you mean making a decoder using a MULTIPLEXER?

ReplyDeleteThen It Is better to use 2:1 mux In all circuit because due to this a circuit size will minimized.

ReplyDeleteI wanted to know, Is there any disadvantages if we use mux as universal gate?

ReplyDeleteMUX might not occupy lesser area as compared to other universal gates like NAND or NOR. It really depends and varies from one technology to another. The biggest disadvantage of using MUX as an universal gate would be the increased pin density. Consider a 2 input NAND gate. It would have 3 pins, so you need routing resources for these 3 pins. MUX would have 4. This would result in increased pin-density and might result in congestion issues while routing the design.

DeleteDoes it make sense?

Half Adder using Decoder 2 to 4 (with enable) and an OR gate?

ReplyDeleteThat could be another problem. Using decoders and OR gates, one can realize any boolean function as a sum of corresponding minterms.

Deleteplease tell me how to implement half subtractor using mux.... please

ReplyDeleteHi Jenny,

DeleteIt wouldn't help you if I were to post the solution. I would strongly recommend you to arrive at the solution from the truth table.

Truth table would be:

P Q D B (P, Q are inputs; D is the difference; B is the borrow)

0 0 0 0

0 1 1 1

1 0 1 0

1 1 0 0

Now look at the outputs D and B. And try to implement it first using primitive gates, and then using 2:1 MUX. Please feel free to revert back in case you still have a doubt.

I hope it'll help.

Can you tell the advantages of implementing 2:1 mux using halfadder...

ReplyDelete-->reply

Hi Naveen,

DeleteThere's no advantage of implementing a 2:1 MUX using HA, but imagine a scenario where you have only Half adders and you wish to realize a multiplexer?

Alternatively, let's say, you taped-out your design with lots of spare cells in the base layer. However, you need to do some ECOs by changing the metal interconnects. And by chance you have lots of half adders. At that time you could use half adders to make a MUX.

In reality, it was just a problem intended to give you a feel that it is possible to play around with digital components! :)

Thanks,

Naman

In designing of multipliers as a part of digital system design in VLSI , using multiplexers or full adders would be more beneficial keeping in mind the characterisitics like delay , power and area of the multiplier ?? which of the two is likely to give us better results of the multiplier constraints specified above ???

ReplyDeleteHey Naman, great blog! Very helpful !

ReplyDelete