December 19, 2015

Drain and the Source of MOS Transistors

How does one decide which terminal of the MOS Transistor is the Source and which terminal is the Drain?



While most of us are taught one basic rule in our introduction classes to the CMOS Transistor: The source of an NMOS is typically at the lowest potential while the source of a PMOS transistor is at the highest potential. 

While this rule is correct, there got to be a plausible technical explanation behind this nomenclature. In this post, I'll discuss that explanation.


First of all one must appreciate the fact that unlike BJT, MOSFET is a symmetric structure. By this, I mean that any terminal can act as drain or source depending upon the voltage applied on that particular terminal. In NMOS: Source is the terminal which is at the lowest potential. In PMOS, Source is the terminal with the highest potential. Now, the question arrives why did we choose to call a particular terminal as source or drain. Read on.

In NMOS, the majority charge carriers are the electrons. If you've followed the physics behind the transistor operation, you'd know that current in an NMOS flows from Drain to Source. Alternatively, electrons flow from the source to drain. Source is therefore the "reservoir" or "source" of electrons which get "drained" at the Drain! That's where the terminology comes from. Therefore, the source of electrons in an NMOS has to be connected to the lowest potential, that being the VSS. And Drain to the higher potential, which could perhaps be VDD.

In PMOS, the majority charge carriers are the holes. Holes will flow from higher potential to a lower potential. Higher potential terminal would act as the "source" of holes. That would therefore be VDD. These holes would get "drained" at a lower potential, which could perhaps be VSS. Therefore, for PMOS, higher potential terminal would be the Source, and lower potential terminal would be the drain! 

5 comments:

  1. In NMOS , you are saying source is at lower potential and Source is "reservoir" or "source " of electrons , I didn't understand this concept(i.e, how come lower potential is source of electrons) , can you please elaborate it ?

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  2. I think here you have to consider the direction of current.Actually in NMOS the current is from Drain to Source .i.e from higher potential(Drain) to lower potential (Source).The situation is opposite in the case of PMOS where the current is from source to drain. Correct me if I am wrong

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    1. I believe you'll need to consider the direction of flow of majority charge carriers, instead of the current.

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  3. Can you elaborate same concept in terms of weak 1 and weak zero ( i.e. take example of inverter. in inverter when we reverse the position of NMOS(Source to VDD) and PMOS(source to VSS), will get weak 1 and wak 0 at o/p )

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    1. Sure, Umesh. I'll try and write a brief post about this concept soon!

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