## January 19, 2015

### Puzzle: Best Performing Processor

You have 3 different processors:

• Single Cycle CPU
• Multi Cycle CPU
• Pipelined CPU
All the three processors, somehow magically, are clocked at the same rate. Can you arrange these processors in the descending order of the performance and a small explanation for the answer?

1. single, pipeline & multi?

1. That is the correct answer, Sunny! :)

2. You mean time taken to execute an instruction is same in all three ?

3. pipelined, multi cycle, single cycle ??

1. Contrary to the general perception, single cycle CPU would be the fastest! Read the explanation below.

4. Dear Anonymous,
I meant that the clock that is feeding the three processors have the same time period.

Sunny and Ashish: Thanks for posting the answer. I'll get back to you with the correct answer shortly.

Thanks,
Naman

5. In this case , in terms of performance , Pipeline CPU > Single cycle CPU > Multiple cycle CPU

In Single Cycle CPU, clock period depends on the slowest instruction
In multi-cycle CPU, the cycle time is determined by the slowest functional unit [memory, registers, alu]. this greatly reduces the clock period.

But here assuming that all are operating at same frequency (lets say 1ns.)
Assume instruction has 3 processing steps (fetch, decode, execute)

For a single CPU, it takes 1 ns to process a single instruction(fetch, decode, execute)
For a multi cycle CPU, it takes 3 ns (1ns for each step) to process a single instruction, as it divides cycle for each step
For a pipe line CPU, decode step of 2nd instruction starts in the first cycle itself.

1. That is a comprehensive explanation, Kranthi! Thanks for posting your answer in such detail. I'd just like to add that the pipelined processor would also have control and data hazards which would further degrade the performance but not as much as a multi-cycle CPU.

6. I think the performance order is very dependent on the type of instruction being executed. For example in general we conclude that pipelined are faster than single cycle processors but that is only if the impact of pipeline latency and idle period is negligible. Even though ARM sells multistage pipelined processors their performance also degrades if certain branching instructions or sequences are fed continuously which stall the pipeline temporarily and degrade its performance.

Multi-cycle also has a similar story. if all of my instructions are those that utilize only a single cycle event say add+1 then it rather has a degraded performance than single cycle.

So in a nutshell they all have their own quirks and clock cycle alone is not conclusive to grade them for performance.

1. Dear anonymous,

Your contention is correct. While it is not possible to have a pipelined processor and a single cycle CPU working at the same frequency, that was indeed the assumption for the sake of the problem.