Showing posts with label Multiplexer Tree. Show all posts
Showing posts with label Multiplexer Tree. Show all posts

January 01, 2013

Parallel to Serial Converter


Let's discuss the design of a Parallel to Serial Converter. Here's the crude problem statement.

You have 8 FFs, each working at a frequency of 10MHz and sending out a parallel data which effectively would be 8-bit wide. We intend to convert this data into a serial one, where 1 FF would output the data serially in order of first FF, then data of second FF and so on. Refer to the diagram below:
Such a parallel to serial converter might be useful in applications requiring Serial Communication which maybe interface to a microprocessor or a microcontroller; interface between your monitor and the CPU or any application which might involve serial processing of information.

Now let's proceed for the design. Note that:
  • We have 8-bits of input data, and we want to output them one at a time. This suggests the use of a multiplexer. The size of this multiplexer would obviously be 8:1.
  • Apart from the inputs, the multiplexer would have select lines (3 select lines for a 8:1 MUX) and we need to control these lines. Select lines need to be controlled in such a way that first the FF1 is selected, then FF2 and so on. 
  • Recall the functionality of a multiplexer. The first bit is selected when select lines would be {S2,S1,S0} = 000, Second bit when {S2,S1,S0} = 001. Hence we can use a binary counter which would count from 000 to 111 in a binary manner.
  • What would be the frequency of this counter? Note that for every one cycle of input data, we need to 8 outputs corresponding to 8 input FFs. Hence the frequency of the counter would be:
Freq. = 8 X 10 MHz = 80 MHz
Here's the final design: